Please use this identifier to cite or link to this item: http://hdl.handle.net/2440/57056
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Type: Journal article
Title: A novel low-power full-adder cell for low voltage
Author: Navi, K.
Maeen, M.
Foroutan, V.
Timarchi, S.
Kavehei, O.
Citation: Integration-The VLSI Journal, 2009; 42(4):457-467
Publisher: Elsevier Science BV
Issue Date: 2009
ISSN: 0167-9260
1872-7522
Statement of
Responsibility: 
Keivan Navi, Mehrdad Maeen, Vahid Foroutan, Somayeh Timarchi, Omid Kavehei
Keywords: Full adder; Majority function; Low power; Very large-scale integrated (VLSI) circuit; Performance analysis; Static CMOS inverter; MOSCAP
Description: Copyright © 2009 Elsevier B.V. All rights reserved.
RMID: 0020091180
DOI: 10.1016/j.vlsi.2009.02.001
Appears in Collections:Electrical and Electronic Engineering publications

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